Wednesday, 26 July 2017

c - memory barrier and cache flush

Is there any archs where a memory barrier is implemented even with a cache flush? I read that memory barrier affects only CPU reordering but I read statements related to the memory barriers: ensures all the cpu will see the value..., but for me it means a cache flush/invalidation.

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casting - Why wasn't Tobey Maguire in The Amazing Spider-Man? - Movies & TV

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